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mirror of https://github.com/Ryubing/Ryujinx.git synced 2026-02-14 18:47:19 -05:00
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7e9011673b1593aa2b318e312e0b31379e2e57e4
Ryujinx/ARMeilleure
History
merry ce71f9144e InstEmitMemory32: Literal loads always have word-aligned PC (#3104)
2022-02-11 17:51:03 -03:00
..
CodeGen
Add a limit on the number of uses a constant may have (#3097)
2022-02-09 17:42:47 -03:00
Common
Optimize LSRA (#2563)
2021-10-08 18:15:44 -03:00
Decoders
ARMeilleure: A32: Implement SHSUB8 and UHSUB8 (#3089)
2022-02-08 10:46:42 +01:00
Diagnostics
Add an early TailMerge pass (#2721)
2021-10-18 19:51:22 -03:00
Instructions
InstEmitMemory32: Literal loads always have word-aligned PC (#3104)
2022-02-11 17:51:03 -03:00
IntermediateRepresentation
Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015)
2022-01-21 12:47:34 -03:00
Memory
Replace CacheResourceWrite with more general "precise" write (#2684)
2021-09-29 02:27:03 +02:00
Signal
Remove usage of Mono.Posix.NETStandard accross all projects (#2906)
2021-12-08 18:24:26 -03:00
State
Implement a "Pause Emulation" option & hotkey (#2428)
2021-09-11 22:08:25 +02:00
Translation
Fix small precision error on CPU reciprocal estimate instructions (#3061)
2022-01-29 23:59:34 +01:00
Allocators.cs
Optimize LSRA (#2563)
2021-10-08 18:15:44 -03:00
ARMeilleure.csproj
Remove usage of Mono.Posix.NETStandard accross all projects (#2906)
2021-12-08 18:24:26 -03:00
Optimizations.cs
Add multi-level function table (#2228)
2021-05-29 18:06:28 -03:00
Statistics.cs
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