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https://github.com/google/pebble.git
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Import of the watch repository from Pebble
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0
third_party/nanopb/tests/site_scons/platforms/avr/__init__.py
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0
third_party/nanopb/tests/site_scons/platforms/avr/__init__.py
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26
third_party/nanopb/tests/site_scons/platforms/avr/avr.py
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26
third_party/nanopb/tests/site_scons/platforms/avr/avr.py
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@@ -0,0 +1,26 @@
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# Compiler settings for running the tests on a simulated atmega1284.
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def set_avr_platform(env):
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native = env.Clone()
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native.Append(LIBS = ["simavr", "libelf"], CFLAGS = "-Wall -Werror -g")
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runner = native.Program("build/run_test", "site_scons/platforms/avr/run_test.c")
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env.Replace(EMBEDDED = "AVR")
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env.Replace(CC = "avr-gcc",
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CXX = "avr-g++")
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env.Replace(TEST_RUNNER = "build/run_test")
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env.Append(CFLAGS = "-mmcu=atmega1284 -Dmain=app_main -Os -g -Wall ")
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env.Append(CXXFLAGS = "-mmcu=atmega1284 -Dmain=app_main -Os -Wno-type-limits")
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env.Append(CPPDEFINES = {'PB_CONVERT_DOUBLE_FLOAT': 1, 'UNITTESTS_SHORT_MSGS': 1,
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'__ASSERT_USE_STDERR': 1, 'MAX_ALLOC_BYTES': 32768,
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'FUZZTEST_BUFSIZE': 2048})
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env.Append(LINKFLAGS = "-mmcu=atmega1284")
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env.Append(LINKFLAGS = "-Wl,-Map,build/avr.map")
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# Build library for communicating with test runner
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avr_io = env.Object("build/avr_io.o", "site_scons/platforms/avr/avr_io.c")
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env.Append(LIBS = avr_io)
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# This fake define just ensures that the test runner gets build also
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env.Depends(avr_io, runner)
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91
third_party/nanopb/tests/site_scons/platforms/avr/avr_io.c
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91
third_party/nanopb/tests/site_scons/platforms/avr/avr_io.c
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@@ -0,0 +1,91 @@
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/* This wrapper file initializes stdio to UART connection and
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* receives the list of command line arguments.
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*/
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <avr/sleep.h>
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#undef main
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extern int app_main(int argc, const char **argv);
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struct {
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uint8_t argc;
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char args[3][16];
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} g_args;
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int uart_putchar(char c, FILE *stream)
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{
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loop_until_bit_is_set(UCSR0A, UDRE0);
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UDR0 = c;
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return 0;
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}
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int uart_getchar(FILE *stream)
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{
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while (bit_is_clear(UCSR0A, RXC0) && bit_is_clear(UCSR0A, FE0));
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if (UCSR0A & _BV(FE0)) return _FDEV_EOF; /* Break = EOF */
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return UDR0;
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}
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FILE uart_str = FDEV_SETUP_STREAM(uart_putchar, uart_getchar, _FDEV_SETUP_RW);
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static char g_malloc_heap[8192];
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extern uint32_t __bss_end;
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void abort(void)
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{
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if (__bss_end != 0xDEADBEEF)
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{
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fprintf(stderr, "possible stack overflow\n");
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}
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fprintf(stderr, "abort() called\n");
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DDRB = 3;
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PORTB = 1;
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cli();
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while (1) sleep_mode();
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}
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int main(void)
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{
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const char *argv[4] = {"main", g_args.args[0], g_args.args[1], g_args.args[2]};
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int status;
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UBRR0 = (8000000 / (16UL * 9600)) - 1; /* 9600 bps with default 8 MHz clock */
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UCSR0B = _BV(TXEN0) | _BV(RXEN0);
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__malloc_heap_start = g_malloc_heap;
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__malloc_heap_end = g_malloc_heap + sizeof(g_malloc_heap);
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__bss_end = 0xDEADBEEF;
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stdout = stdin = stderr = &uart_str;
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fread((char*)&g_args, 1, sizeof(g_args), stdin);
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status = app_main(g_args.argc + 1, argv);
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if (__bss_end != 0xDEADBEEF)
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{
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status = 255;
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fprintf(stderr, "possible stack overflow\n");
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}
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DDRB = 3;
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if (status)
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{
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fprintf(stderr, "Error exit: %d\n", status);
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PORTB = 1; // PB0 indicates error
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}
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else
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{
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PORTB = 2; // PB1 indicates success
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}
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cli();
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sleep_mode();
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return status;
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}
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196
third_party/nanopb/tests/site_scons/platforms/avr/run_test.c
vendored
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196
third_party/nanopb/tests/site_scons/platforms/avr/run_test.c
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@@ -0,0 +1,196 @@
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#include <unistd.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include <stdlib.h>
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#include <stdbool.h>
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#include <string.h>
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#include <stdio.h>
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#include <libgen.h>
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#include <simavr/sim_avr.h>
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#include <simavr/sim_gdb.h>
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#include <simavr/avr_ioport.h>
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#include <simavr/sim_elf.h>
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#include <simavr/avr_uart.h>
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static avr_t *g_avr;
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static avr_irq_t *g_uart_irq;
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static struct {
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uint8_t argc;
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char args[3][16];
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} g_args;
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static int g_args_idx;
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static bool g_uart_xon;
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static bool g_status_ok;
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static void uart_tx_hook(struct avr_irq_t * irq, uint32_t value, void * param)
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{
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fputc(value, stdout);
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fflush(stdout);
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}
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static bool stdin_can_read()
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{
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struct timeval tv;
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fd_set fds;
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tv.tv_sec = 0;
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tv.tv_usec = 0;
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FD_ZERO(&fds);
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FD_SET(STDIN_FILENO, &fds);
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select(STDIN_FILENO+1, &fds, NULL, NULL, &tv);
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return (FD_ISSET(0, &fds));
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}
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static void avr_logger(avr_t * avr, const int level, const char * format, va_list ap)
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{
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if ((!avr && level <= LOG_WARNING) || (avr && avr->log >= level)) {
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vfprintf(stderr , format, ap);
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}
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}
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static void uart_xon_hook(struct avr_irq_t * irq, uint32_t value, void * param)
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{
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g_uart_xon = true;
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int v;
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if (feof(stdin))
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{
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avr_raise_irq(&g_uart_irq[1], UART_INPUT_FE);
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return;
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}
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while (g_uart_xon)
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{
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if (g_args_idx < sizeof(g_args))
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{
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v = ((char*)&g_args)[g_args_idx++];
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}
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else if (stdin_can_read())
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{
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v = fgetc(stdin);
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}
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else
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{
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break;
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}
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if (v != EOF)
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{
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avr_raise_irq(&g_uart_irq[1], v);
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}
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else
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{
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avr_raise_irq(&g_uart_irq[1], UART_INPUT_FE);
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break;
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}
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}
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}
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static void uart_xoff_hook(struct avr_irq_t * irq, uint32_t value, void * param)
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{
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g_uart_xon = false;
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}
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void init_uart()
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{
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const char *irq_names[2] = {"8<uart_in", "8>uart_out"};
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g_uart_irq = avr_alloc_irq(&g_avr->irq_pool, 0, 2, irq_names);
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avr_irq_register_notify(&g_uart_irq[0], &uart_tx_hook, NULL);
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uint32_t flags = 0;
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avr_ioctl(g_avr, AVR_IOCTL_UART_GET_FLAGS('0'), &flags);
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flags &= ~AVR_UART_FLAG_STDIO;
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flags &= ~AVR_UART_FLAG_POLL_SLEEP;
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avr_ioctl(g_avr, AVR_IOCTL_UART_SET_FLAGS('0'), &flags);
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avr_irq_t *src = avr_io_getirq(g_avr, AVR_IOCTL_UART_GETIRQ('0'), UART_IRQ_OUTPUT);
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avr_irq_t *dst = avr_io_getirq(g_avr, AVR_IOCTL_UART_GETIRQ('0'), UART_IRQ_INPUT);
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avr_connect_irq(src, &g_uart_irq[0]);
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avr_connect_irq(&g_uart_irq[1], dst);
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avr_irq_t *xon = avr_io_getirq(g_avr, AVR_IOCTL_UART_GETIRQ('0'), UART_IRQ_OUT_XON);
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avr_irq_t *xoff = avr_io_getirq(g_avr, AVR_IOCTL_UART_GETIRQ('0'), UART_IRQ_OUT_XOFF);
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avr_irq_register_notify(xon, uart_xon_hook, NULL);
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avr_irq_register_notify(xoff, uart_xoff_hook, NULL);
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}
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static void status_ok_hook(struct avr_irq_t * irq, uint32_t value, void * param)
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{
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g_status_ok = value;
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}
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int main(int argc, char *argv[])
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{
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avr_global_logger_set(&avr_logger);
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g_avr = avr_make_mcu_by_name("atmega1284");
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if (!g_avr)
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{
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fprintf(stderr, "avr_make_mcu_by_name failed\n");
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return 1;
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}
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if (argc < 2)
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{
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fprintf(stderr, "Usage: %s [-g] binary [args ...]\n", argv[0]);
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return 2;
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}
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const char *filename = argv[1];
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bool enable_gdb = false;
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int argc_offset = 2;
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if (strcmp(filename, "-g") == 0)
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{
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enable_gdb = true;
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argc_offset = 3;
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filename = argv[2];
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}
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elf_firmware_t firmware = {};
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elf_read_firmware(filename, &firmware);
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avr_init(g_avr);
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avr_load_firmware(g_avr, &firmware);
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g_avr->frequency = 8000000;
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if (enable_gdb)
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{
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g_avr->state = cpu_Stopped;
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g_avr->gdb_port = 1234;
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avr_gdb_init(g_avr);
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}
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init_uart();
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avr_irq_register_notify(avr_io_getirq(g_avr, AVR_IOCTL_IOPORT_GETIRQ('B'), 1), status_ok_hook, NULL);
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// Pass the rest of arguments to application inside simulator
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g_args.argc = argc - argc_offset;
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if (g_args.argc > 3) g_args.argc = 3;
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for (int i = 0; i < g_args.argc; i++)
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{
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strncpy(g_args.args[i], argv[i + argc_offset], 15);
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}
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while (1)
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{
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int state = avr_run(g_avr);
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if (state == cpu_Done)
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break;
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if (state == cpu_Crashed)
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{
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fprintf(stderr, "CPU Crashed\n");
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return 3;
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}
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}
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if (g_status_ok)
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{
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return 0;
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}
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else
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{
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fprintf(stderr, "Received error status from simulation\n");
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return 5;
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}
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}
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